@inproceedings{1bf3b2a1a9a74f0fbacaff0eefe16990,
title = "Lazy Pipelines: Enhancing quality in approximate computing",
abstract = "Approximate computing techniques based on Voltage Over-Scaling (VOS) can provide quadratic improvements in power efficiency. However, voltage scaling is limited by the inherent fault-tolerance of an application, thus preventing VOS schemes from realizing their full potential. To gain further power efficiency a reduction of the error rate experienced in a given voltage level is required. We propose Lazy Pipelines, a micro-architectural technique that utilizes vacant cycles in a VOS functional unit to extend execution and reduce the error rate.",
keywords = "approximate computing, microarchitecture, power efficiency",
author = "G. Tziantzioulis and Gok, {A. M.} and Faisal, {S. M.} and N. Hardavellas and S. Ogrenci-Memik and S. Parthsarathy",
note = "Funding Information: This work is partially supported by NSF award CCF-1218768, NSF CAREER award CCF-1453853, and the Intel Parallel Computing Center at Northwestern. Publisher Copyright: {\textcopyright} 2016 EDAA.; 19th Design, Automation and Test in Europe Conference and Exhibition, DATE 2016 ; Conference date: 14-03-2016 Through 18-03-2016",
year = "2016",
month = apr,
day = "25",
language = "English (US)",
series = "Proceedings of the 2016 Design, Automation and Test in Europe Conference and Exhibition, DATE 2016",
publisher = "Institute of Electrical and Electronics Engineers Inc.",
pages = "1381--1386",
booktitle = "Proceedings of the 2016 Design, Automation and Test in Europe Conference and Exhibition, DATE 2016",
address = "United States",
}