Leakage power optimization with dual-Vth library in high-level synthesis

Xiaoyong Tang*, Hai Zhou, Prith Banerje

*Corresponding author for this work

Research output: Contribution to journalConference articlepeer-review

35 Scopus citations


In this paper we address the problem of module selection during high-level synthesis. We present a heuristic algorithm for leakage power optimization based on the maximum weight independent set problem. A dual threshold voltage (V th) technique is used to reduce leakage energy consumption in a data flow graph. Experiments are performed on a data-path dominated test suite of six benchmarks. Our approach achieves an average of 70.9% leakage power reduction, which is very close to the optimal results from an Integer Linear Programming approach.

Original languageEnglish (US)
Article number13.2
Pages (from-to)202-207
Number of pages6
JournalProceedings - Design Automation Conference
StatePublished - Dec 1 2005
Event42nd Design Automation Conference, DAC 2005 - Anaheim, CA, United States
Duration: Jun 13 2005Jun 17 2005


  • Dual-V
  • High-Level Synthesis
  • Leakage Power
  • Optimization

ASJC Scopus subject areas

  • Hardware and Architecture
  • Control and Systems Engineering


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