Logic gates and computation from assembled nanowire building blocks

Y. Huang, X. Duan, Y. Cui, L. J. Lauhon, K. H. Kim, C. M. Lieber*

*Corresponding author for this work

Research output: Contribution to journalArticle

2009 Scopus citations

Abstract

Miniaturization in electronics through improvements in established "top-down" fabrication techniques is approaching the point where fundamental issues are expected to limit the dramatic increases in computing seen over the past several decades. Here we report a "bottom-up" approach in which functional device elements and element arrays have been assembled from solution through the use of electronically well-defined semiconductor nanowire building blocks. We show that crossed nanowire p-n junctions and junction arrays can be assembled in over 95% yield with controllable electrical characteristics, and in addition, that these junctions can be used to create integrated nanoscale field-effect transistor arrays with nanowires as both the conducting channel and gate electrode. Nanowire junction arrays have been configured as key OR, AND, and NOR logic-gate structures with substantial gain and have been used to implement basic computation.

Original languageEnglish (US)
Pages (from-to)1313-1317
Number of pages5
JournalScience
Volume294
Issue number5545
DOIs
StatePublished - Nov 9 2001

ASJC Scopus subject areas

  • General

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