@inproceedings{6f6095153f7d4af9b7f53b007e1a02a0,
title = "Memristor-Based Clock Design and Optimization with In-Situ Tunability",
abstract = "Process variation is the dominating factor for performance degradation in modern IC chips. The conventional guard-band design methodology leads to significant performance penalty. This paper utilizes an emerging non-volatile resistive device, memristor, with timing violation detectors to dynamically achieve local recovery from timing violation during the runtime, eliminating the necessity of testing phase. It develops a systematic self-tuning mechanism that globally adjusts the clock skew scheduling to compensate the timing violation, and determines the tunability of the memristor-based self-tunable circuits. It also proposes an algorithmic memristor placement across the clock tree to balance the tradeoff between hardware cost and system tunability. Experimental results show that our approach can improve the yield from 90% to 98% with only 4% overhead in average.",
keywords = "clock skew scheduling, memristor, online tuning, placement, resilient",
author = "Shuyu Kong and Jie Gu and Hai Zhou",
note = "Funding Information: This work is partially supported by NSF under CNS-1441695 and CCF-1533656, and by SRC under 2014-TS-2559. Publisher Copyright: {\textcopyright} 2017 IEEE.; 2017 IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2017 ; Conference date: 03-07-2017 Through 05-07-2017",
year = "2017",
month = jul,
day = "20",
doi = "10.1109/ISVLSI.2017.81",
language = "English (US)",
series = "Proceedings of IEEE Computer Society Annual Symposium on VLSI, ISVLSI",
publisher = "IEEE Computer Society",
pages = "427--432",
editor = "Ricardo Reis and Mircea Stan and Michael Huebner and Nikolaos Voros",
booktitle = "Proceedings - 2017 IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2017",
address = "United States",
}