Model-based design is being increasingly used in the development of real-time embedded control systems due to its capabilities to support early design verification and validation through formal functional models. Similarly as in the case for circuit design, to facilitate the adoption of high level functional models and truly reduce design complexity, it is important to have automated synthesis tools that can generate correct and optimal implementations from those functional models. The development of such synthesis tools has some unique challenges compared to synchronous circuit design - the functional model for real-time embedded systems has more diverse semantics, the implementation platform is more distributed and often asynchronous, and there are often strict timing requirements along with various design objectives such as system performance, safety, security and extensibility. In this paper, we discuss the major challenges in developing model-based synthesis tools for real-time embedded systems, and present an overview of our integrated synthesis flow that addresses task generation, task mapping, and code generation in a holistic fashion. The synthesis process considers a variety of design objectives, and we will highlight the trade-off between timing-related objectives and security.