Abstract
Although there has been extensive research on controlling leakage power, the fact that leaky transistors can act as a damping element for supply noise has been long ignored or unnoticed in the design community. This paper investigates the leakage induced damping effect that helps suppress the supply noise. By developing physics-based impedance models for active and leakage currents, we show that leakage, particularly gate tunneling leakage, provides more damping than strong-inversion current. Simulations were performed in a 32nm CMOS technology to validate our models under PVT variations and to explore the voltage dependent behavior of this phenomenon. Design example utilizing leakage induced damping such as decap assignment is discussed with results showing 15.6% saving in decap area.
Original language | English (US) |
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Title of host publication | ISLPED'06 - Proceedings of the 2006 International Symposium on Low Power Electronics and Design |
Pages | 382-387 |
Number of pages | 6 |
Volume | 2006 |
DOIs | |
State | Published - Dec 1 2006 |
Event | ISLPED'06 - 11th ACM/IEEE International Symposium on Low Power Electronics and Design - Tegernsee, Bavaria, Germany Duration: Oct 4 2006 → Oct 6 2006 |
Other
Other | ISLPED'06 - 11th ACM/IEEE International Symposium on Low Power Electronics and Design |
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Country/Territory | Germany |
City | Tegernsee, Bavaria |
Period | 10/4/06 → 10/6/06 |
Keywords
- Damping effect
- Gate leakage
- Subthreshold leakage
- Supply noise
ASJC Scopus subject areas
- General Engineering