A model of superconducting computer memory exploiting the orthogonal spin transfer (OST) in a pseudo-spin-valve (PSV) that is controlled by a three-terminal Josephson superconducting-ferromagnetic transistor (SFT) is developed. The building blocks of the memory are hybrid PSV and SFT structures. The memory model is formulated in terms of the equation-defined PSV and SFT devices integrated into the PSV-SFT-memory-cell (MC) circuit. Logical units "0" and "1" are associated with the two PSV states characterized by two different resistance values. Elementary logical operations comprising the read-write processes occur when a word pulse applied to the SFT's injector coincides with the respective bit pulse acting on the MC. Physically, a word pulse switches the SFT to a resistive state, causing PSV switching between the logical "0" and "1" states. Thus, the whole switching dynamics of the MC depends on the nonequilibrium and nonstationary properties of the PSV and SFT. Modeling of the single MC as well as larger MC-based circuits comprising 12 and 30 elements, respectively, suggests that such memory cells can undergo ultrafast switching (subnanosecond) and have low energy consumption per operation (sub-100 fJ). The model suggested allows the study of the influence of noise, the punch-through effect, cross talk, parasitic effects, etc. The results obtained suggest that the hybrid PSV-SFT structures are well suited to superconducting computing circuits as they are built from magnetic and nonmagnetic transition metals and therefore have low impedances (1-30 ω).
ASJC Scopus subject areas
- Physics and Astronomy(all)