MONOLITHICALLY INTEGRATED RECEIVER FRONT-END: IN//0//. //5//3GA//0//. //4//7AS PIN-AMPLIFIER.

Chu Liang Cheng; R. P H Chang; B. Tell; S. M. Zima; Y. Ota; G. P. Vella-Coleiro; R. C. Miller; J. L. Zilko; B. L. Kasper; K. F. Brown-Goebeler; V. D. Mattera

MONOLITHICALLY INTEGRATED RECEIVER FRONT-END: IN//0//. //5//3GA//0//. //4//7AS PIN-AMPLIFIER.

Chu Liang Cheng^*, R. P H Chang, B. Tell, S. M. Zima, Y. Ota, G. P. Vella-Coleiro, R. C. Miller, J. L. Zilko, B. L. Kasper, K. F. Brown-Goebeler, V. D. Mattera

^*Corresponding author for this work

Materials Science and Engineering

Research output: Contribution to journal › Article › peer-review

Abstract

A monolithically integrated In//0//. //5//3Ga//0//. //4//7As p-i-n-amplifier fabricated on n-InP substrates is discussed. The structure utilizes a vertical integration of p-i-n-diode and recessed-gate InP MISFETs, yet with a planar surface for fine-line photolithography. The preamplifier consists of a gain stage and a buffer stage, both made of InP MISFETs with aluminum phosphorus oxide as gate insulator. This is by far the most complex integrated optoelectronic circuit on InP ever reported. At 400 Mb/s, the receiver sensitivity is better than minus 27 dBm for 1 multiplied by 10** minus **9 bit-error rate.

Original language	English (US)
Journal	IEEE Transactions on Electron Devices
Volume	ED-34
Issue number	11
State	Published - Nov 1 1987

ASJC Scopus subject areas

Electronic, Optical and Magnetic Materials
Electrical and Electronic Engineering

Cite this

@article{27a1e89e52fb42ee8c714ff21f0b47b1,

title = "MONOLITHICALLY INTEGRATED RECEIVER FRONT-END: IN//0//. //5//3GA//0//. //4//7AS PIN-AMPLIFIER.",

abstract = "A monolithically integrated In//0//. //5//3Ga//0//. //4//7As p-i-n-amplifier fabricated on n-InP substrates is discussed. The structure utilizes a vertical integration of p-i-n-diode and recessed-gate InP MISFETs, yet with a planar surface for fine-line photolithography. The preamplifier consists of a gain stage and a buffer stage, both made of InP MISFETs with aluminum phosphorus oxide as gate insulator. This is by far the most complex integrated optoelectronic circuit on InP ever reported. At 400 Mb/s, the receiver sensitivity is better than minus 27 dBm for 1 multiplied by 10** minus **9 bit-error rate.",

author = "Cheng, {Chu Liang} and Chang, {R. P H} and B. Tell and Zima, {S. M.} and Y. Ota and Vella-Coleiro, {G. P.} and Miller, {R. C.} and Zilko, {J. L.} and Kasper, {B. L.} and Brown-Goebeler, {K. F.} and Mattera, {V. D.}",

year = "1987",

month = nov,

day = "1",

language = "English (US)",

volume = "ED-34",

journal = "IEEE Transactions on Electron Devices",

issn = "0018-9383",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

number = "11",

}

TY - JOUR

T1 - MONOLITHICALLY INTEGRATED RECEIVER FRONT-END

T2 - IN//0//. //5//3GA//0//. //4//7AS PIN-AMPLIFIER.

AU - Cheng, Chu Liang

AU - Chang, R. P H

AU - Tell, B.

AU - Zima, S. M.

AU - Ota, Y.

AU - Vella-Coleiro, G. P.

AU - Miller, R. C.

AU - Zilko, J. L.

AU - Kasper, B. L.

AU - Brown-Goebeler, K. F.

AU - Mattera, V. D.

PY - 1987/11/1

Y1 - 1987/11/1

N2 - A monolithically integrated In//0//. //5//3Ga//0//. //4//7As p-i-n-amplifier fabricated on n-InP substrates is discussed. The structure utilizes a vertical integration of p-i-n-diode and recessed-gate InP MISFETs, yet with a planar surface for fine-line photolithography. The preamplifier consists of a gain stage and a buffer stage, both made of InP MISFETs with aluminum phosphorus oxide as gate insulator. This is by far the most complex integrated optoelectronic circuit on InP ever reported. At 400 Mb/s, the receiver sensitivity is better than minus 27 dBm for 1 multiplied by 10** minus **9 bit-error rate.

AB - A monolithically integrated In//0//. //5//3Ga//0//. //4//7As p-i-n-amplifier fabricated on n-InP substrates is discussed. The structure utilizes a vertical integration of p-i-n-diode and recessed-gate InP MISFETs, yet with a planar surface for fine-line photolithography. The preamplifier consists of a gain stage and a buffer stage, both made of InP MISFETs with aluminum phosphorus oxide as gate insulator. This is by far the most complex integrated optoelectronic circuit on InP ever reported. At 400 Mb/s, the receiver sensitivity is better than minus 27 dBm for 1 multiplied by 10** minus **9 bit-error rate.

UR - http://www.scopus.com/inward/record.url?scp=0023453172&partnerID=8YFLogxK

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M3 - Article

AN - SCOPUS:0023453172

SN - 0018-9383

VL - ED-34

JO - IEEE Transactions on Electron Devices

JF - IEEE Transactions on Electron Devices

IS - 11

ER -

MONOLITHICALLY INTEGRATED RECEIVER FRONT-END: IN//0//. //5//3GA//0//. //4//7AS PIN-AMPLIFIER.

Abstract

ASJC Scopus subject areas

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