TY - GEN
T1 - ObfusLock
T2 - 2023 Design, Automation and Test in Europe Conference and Exhibition, DATE 2023
AU - Li, You
AU - Zhao, Guannan
AU - He, Yunqi
AU - Zhou, Hai
N1 - Funding Information:
by the National Science Foundation
Publisher Copyright:
© 2023 EDAA.
PY - 2023
Y1 - 2023
N2 - With the rapid evolution of the IC supply chain, circuit IP protection has become a critical realistic issue for the semiconductor industry. One promising technique to resolve the issue is logic locking. It adds key inputs to the original circuit such that only authorized users can get the correct function, and it modifies the circuit to obfuscate it against structural analysis. However, there is a trilemma among locking, obfuscation, and efficiency within all existing logic locking methods that at most two of the objectives can be achieved. In this work, we propose ObfusLock, the first logic locking method that simultaneously achieves all three objectives: locking security, obfuscation safety, and locking efficiency. ObfusLock is based on solid mathematical proofs, incurs small overheads (<5% on average), and has passed experimental tests of various existing attacks.
AB - With the rapid evolution of the IC supply chain, circuit IP protection has become a critical realistic issue for the semiconductor industry. One promising technique to resolve the issue is logic locking. It adds key inputs to the original circuit such that only authorized users can get the correct function, and it modifies the circuit to obfuscate it against structural analysis. However, there is a trilemma among locking, obfuscation, and efficiency within all existing logic locking methods that at most two of the objectives can be achieved. In this work, we propose ObfusLock, the first logic locking method that simultaneously achieves all three objectives: locking security, obfuscation safety, and locking efficiency. ObfusLock is based on solid mathematical proofs, incurs small overheads (<5% on average), and has passed experimental tests of various existing attacks.
KW - hardware obfuscation
KW - IP piracy
KW - logic locking
KW - logic synthesis
KW - SAT attack
UR - http://www.scopus.com/inward/record.url?scp=85162718326&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=85162718326&partnerID=8YFLogxK
U2 - 10.23919/DATE56975.2023.10136964
DO - 10.23919/DATE56975.2023.10136964
M3 - Conference contribution
AN - SCOPUS:85162718326
T3 - Proceedings -Design, Automation and Test in Europe, DATE
BT - 2023 Design, Automation and Test in Europe Conference and Exhibition, DATE 2023 - Proceedings
PB - Institute of Electrical and Electronics Engineers Inc.
Y2 - 17 April 2023 through 19 April 2023
ER -