Abstract
A packaging technique which provides both optical alignment and electrical interconnection during a single assembly process for SEED chip has been presented. The assembly of the package is a cost-effective because the design lends itself to a batch assembly process. This packaging technique can be easily extended to other types of 2-D surface emitting devices.
Original language | English (US) |
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Pages | 215-216 |
Number of pages | 2 |
State | Published - 1994 |
Event | Proceedings of the 1994 IEEE LEOS Annual Meeting. Part 1 (of 2) - Boston, MA, USA Duration: Oct 31 1994 → Nov 3 1994 |
Other
Other | Proceedings of the 1994 IEEE LEOS Annual Meeting. Part 1 (of 2) |
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City | Boston, MA, USA |
Period | 10/31/94 → 11/3/94 |
ASJC Scopus subject areas
- General Engineering