TY - GEN
T1 - Performance analysis of decimal floating-point libraries and its impact on decimal hardware and software solutions
AU - Anderson, Michael J.
AU - Tsen, Charles
AU - Wang, Liang Kai
AU - Compton, Katherine
AU - Schulte, Michael J.
PY - 2009
Y1 - 2009
N2 - The IEEE Standards Committee recently approved the IEEE 754-2008 Standard for Floating-point Arithmetic, which includes specifications for decimal floating-point (DFP) arithmetic. A growing number of DFP solutions have emerged, and developers now have many DFP design choices including arbitrary or fixed precision, binary or decimal significand encodings, 64-bit or 128-bit DFP operands, and software or hardware implementations. There is a need for accurate analysis of these solutions on representative DFP benchmarks. In this paper, we expand previous DFP benchmark and performance analysis research. We employ a DFP benchmark suite that currently supports several DFP solutions and is easily extendable. We also present performance analysis that (1) provides execution profiles for various DFP encodings and types, (2) gives the average number cycles for common DFP operations and the total number of each DFP operation in each benchmark, and (3) highlights the tradeoffs between using 64-bit and 128-bit DFP operands for both binary and decimal significand encodings. This analysis can help guide the design of future DFP hardware and software solutions.
AB - The IEEE Standards Committee recently approved the IEEE 754-2008 Standard for Floating-point Arithmetic, which includes specifications for decimal floating-point (DFP) arithmetic. A growing number of DFP solutions have emerged, and developers now have many DFP design choices including arbitrary or fixed precision, binary or decimal significand encodings, 64-bit or 128-bit DFP operands, and software or hardware implementations. There is a need for accurate analysis of these solutions on representative DFP benchmarks. In this paper, we expand previous DFP benchmark and performance analysis research. We employ a DFP benchmark suite that currently supports several DFP solutions and is easily extendable. We also present performance analysis that (1) provides execution profiles for various DFP encodings and types, (2) gives the average number cycles for common DFP operations and the total number of each DFP operation in each benchmark, and (3) highlights the tradeoffs between using 64-bit and 128-bit DFP operands for both binary and decimal significand encodings. This analysis can help guide the design of future DFP hardware and software solutions.
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U2 - 10.1109/ICCD.2009.5413114
DO - 10.1109/ICCD.2009.5413114
M3 - Conference contribution
AN - SCOPUS:77950973459
SN - 9781424450282
T3 - Proceedings - IEEE International Conference on Computer Design: VLSI in Computers and Processors
SP - 465
EP - 471
BT - 2009 IEEE International Conference on Computer Design, ICCD 2009
T2 - 2009 IEEE International Conference on Computer Design, ICCD 2009
Y2 - 4 October 2009 through 7 October 2009
ER -