Performance Study of the First 2-D Prototype of Vertically Integrated Pattern Recognition Associative Memory

Gregory Deptuch, James Hoff, Sergo Jindariani, Siddhartha Joshi, Dawei Li, Tiehui Liu, Seda Ogrenci-Memik, Jamieson Olsen, Nhan Tran

Research output: Contribution to journalArticlepeer-review

1 Scopus citations


Extremely fast pattern recognition capabilities are necessary to find and fit billions of tracks at the hardware trigger level produced every second anticipated at high-luminosity Large Hadron Collider (HL-LHC) running conditions. Associative memory (AM)-based approaches for fast pattern recognition have been proposed as a potential solution to the tracking trigger. However, at the HL-LHC, there is much less time available, and the speed performance must be improved over previous systems while maintaining a comparable number of patterns. The vertically integrated pattern recognition AM (VIPRAM) project aims to achieve the target pattern density and performance goal using 3DIC technology. The first step taken in the VIPRAM work was the development of a 2-D prototype (protoVIPRAM00) in which the AM building blocks were designed to be compatible with the 3-D integration. In this article, we present the results from extensive performance studies of the protoVIPRAM00 chip in both realistic HL-LHC and extreme conditions. Results indicate that the chip operates at the design frequency of 100 MHz with perfect correctness in realistic conditions and conclude that the building blocks are ready for 3-D stacking. We also present performance boundary characterization of the chip under extreme conditions.

Original languageEnglish (US)
Article number8966276
Pages (from-to)2111-2118
Number of pages8
JournalIEEE Transactions on Nuclear Science
Issue number9
StatePublished - Sep 2020


  • 3DIC
  • IC testing
  • associative memory (AM)
  • real-time pattern recognition

ASJC Scopus subject areas

  • Nuclear and High Energy Physics
  • Nuclear Energy and Engineering
  • Electrical and Electronic Engineering


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