Power management for FPGAs: Power- driven design partitioning

Rajarshi Mukherjee; Seda Ogrenci Memik

doi:10.1109/FCCM.2004.45

Power management for FPGAs: Power- driven design partitioning

Rajarshi Mukherjee, Seda Ogrenci Memik

Electrical and Computer Engineering

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

1 Scopus citations

Abstract

A power management scheme for FPGAs centered on a power-driven partitioning technique was proposed. The partitioner creates clusters within a design such that within individual clusters, power consumption can be improved by voltage scaling. Algorithms aimed at performing power-driven partitioning were presented and two applications, such as chip-level power management for multi-FPGA systems, and single chip power optimization were formulated using localized voltage scaling. The study show that power improvements as high as 54% is achievable if the number of partitions is not restricted.

Original language	English (US)
Title of host publication	Proceedings - 12th Annual IEEE Symposium on Field-Programmable Custom Computing Machines, FCCM 2004
Editors	J. Arnold, K.L. Pocek
Pages	326-327
Number of pages	2
DOIs	https://doi.org/10.1109/FCCM.2004.45
State	Published - 2004
Event	Proceedings - 12th Annual IEEE Symposium on Field-Programmable Custom Computing Machines, FCCM 2004 - Napa, CA, United States Duration: Apr 20 2004 → Apr 23 2004

Publication series

Name	Proceedings - 12th Annual IEEE Symposium on Field-Programmable Custom Computing Machines, FCCM 2004

Other

Other	Proceedings - 12th Annual IEEE Symposium on Field-Programmable Custom Computing Machines, FCCM 2004
Country/Territory	United States
City	Napa, CA
Period	4/20/04 → 4/23/04

ASJC Scopus subject areas

Engineering(all)

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10.1109/FCCM.2004.45

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Mukherjee, R., & Memik, S. O. (2004). Power management for FPGAs: Power- driven design partitioning. In J. Arnold, & K. L. Pocek (Eds.), Proceedings - 12th Annual IEEE Symposium on Field-Programmable Custom Computing Machines, FCCM 2004 (pp. 326-327). (Proceedings - 12th Annual IEEE Symposium on Field-Programmable Custom Computing Machines, FCCM 2004). https://doi.org/10.1109/FCCM.2004.45

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title = "Power management for FPGAs: Power- driven design partitioning",

abstract = "A power management scheme for FPGAs centered on a power-driven partitioning technique was proposed. The partitioner creates clusters within a design such that within individual clusters, power consumption can be improved by voltage scaling. Algorithms aimed at performing power-driven partitioning were presented and two applications, such as chip-level power management for multi-FPGA systems, and single chip power optimization were formulated using localized voltage scaling. The study show that power improvements as high as 54% is achievable if the number of partitions is not restricted.",

author = "Rajarshi Mukherjee and Memik, {Seda Ogrenci}",

year = "2004",

doi = "10.1109/FCCM.2004.45",

language = "English (US)",

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series = "Proceedings - 12th Annual IEEE Symposium on Field-Programmable Custom Computing Machines, FCCM 2004",

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editor = "J. Arnold and K.L. Pocek",

booktitle = "Proceedings - 12th Annual IEEE Symposium on Field-Programmable Custom Computing Machines, FCCM 2004",

note = "Proceedings - 12th Annual IEEE Symposium on Field-Programmable Custom Computing Machines, FCCM 2004 ; Conference date: 20-04-2004 Through 23-04-2004",

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Mukherjee, R & Memik, SO 2004, Power management for FPGAs: Power- driven design partitioning. in J Arnold & KL Pocek (eds), Proceedings - 12th Annual IEEE Symposium on Field-Programmable Custom Computing Machines, FCCM 2004. Proceedings - 12th Annual IEEE Symposium on Field-Programmable Custom Computing Machines, FCCM 2004, pp. 326-327, Proceedings - 12th Annual IEEE Symposium on Field-Programmable Custom Computing Machines, FCCM 2004, Napa, CA, United States, 4/20/04. https://doi.org/10.1109/FCCM.2004.45

Power management for FPGAs: Power- driven design partitioning. / Mukherjee, Rajarshi; Memik, Seda Ogrenci.
Proceedings - 12th Annual IEEE Symposium on Field-Programmable Custom Computing Machines, FCCM 2004. ed. / J. Arnold; K.L. Pocek. 2004. p. 326-327 (Proceedings - 12th Annual IEEE Symposium on Field-Programmable Custom Computing Machines, FCCM 2004).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

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AB - A power management scheme for FPGAs centered on a power-driven partitioning technique was proposed. The partitioner creates clusters within a design such that within individual clusters, power consumption can be improved by voltage scaling. Algorithms aimed at performing power-driven partitioning were presented and two applications, such as chip-level power management for multi-FPGA systems, and single chip power optimization were formulated using localized voltage scaling. The study show that power improvements as high as 54% is achievable if the number of partitions is not restricted.

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Power management for FPGAs: Power- driven design partitioning

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