Abstract
Anisotropic etching of InP along specific crystallographic directions leads to negative sidewall angles along dovetail direction. This is an important process for self-alignment of electrical contacts where sub-micron alignment is needed. However, existing etching methods are only suitable for shallow etching, and for stress-free layers. Here we demonstrate a new etching method that is capable of producing dovetail patterns with 10 times larger etch depth, and where interface stress exists.We believe this new etching method is useful for many electronic and optoelectronic devices that require precise negative angle sidewalls in their fabrication scheme.
Original language | English (US) |
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Pages (from-to) | P44-P46 |
Journal | ECS Solid State Letters |
Volume | 2 |
Issue number | 5 |
DOIs | |
State | Published - 2013 |
ASJC Scopus subject areas
- Electronic, Optical and Magnetic Materials
- Electrical and Electronic Engineering