Reducing the energy of speculative instruction schedulers

Yongxiang Liu*, Gokhan Memik, Glenn Reinmant

*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

Energy dissipation from the issue queue and register file, constitutes a large portion of the overall energy budget of an aggressive dynamically scheduled microprocessor. We propose techniques to save energy in these structures by reducing issue queue occupancy and by reducing unnecessary register file accesses that can result from speculative scheduling. Our results show a 44% reduction in issue queue occupancies and an 87% reduction in register file accesses for scheduling replays. Our data show that these savings can translate into a 52% saving in issue queue energy, a 13% savings in register file energy, and a 22% overall energy savings.

Original languageEnglish (US)
Title of host publicationProceedings - 2005 IEEE International Conference on Computer Design
Subtitle of host publicationVLSI in Computers and Processors, ICCD 2005
Pages641-646
Number of pages6
DOIs
StatePublished - Dec 1 2005
Event2005 IEEE International Conference on Computer Design: VLSI in Computers and Processors, ICCD 2005 - San Jose, CA, United States
Duration: Oct 2 2005Oct 5 2005

Publication series

NameProceedings - IEEE International Conference on Computer Design: VLSI in Computers and Processors
Volume2005
ISSN (Print)1063-6404

Other

Other2005 IEEE International Conference on Computer Design: VLSI in Computers and Processors, ICCD 2005
CountryUnited States
CitySan Jose, CA
Period10/2/0510/5/05

ASJC Scopus subject areas

  • Hardware and Architecture
  • Electrical and Electronic Engineering

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