Reliability modeling and management of nanophotonic on-chip networks

Zheng Li*, Moustafa Mohamed, Xi Chen, Eric Dudley, Ke Meng, Li Shang, Alan R. Mickelson, Russell E Joseph, Manish Vachharajani, Brian Schwartz, Yihe Sun

*Corresponding author for this work

Research output: Contribution to journalArticlepeer-review

75 Scopus citations

Abstract

While transistor performance and energy efficiency have dramatically improved in recent years, electrical interconnect improvements has failed to keep pace. Recent advances in nanophotonic fabrication have made on-chip optics an attractive alternative. However, system integration challenges remain. In particular, the parameters of on-chip nanophotonic structures are sensitive to fabrication-induced process variation and run-time spatial thermal variation across the die. This work addresses the performance and reliability challenges that arise from this sensitivity to variation. The paper first presents a model predicting the system-level effects of thermal and process variation in nanophotonic networks. It then shows how to optimize many-core system performance and reliability by using run-time techniques to compensate for the thermal and process variation effects.

Original languageEnglish (US)
Article number5664817
Pages (from-to)98-111
Number of pages14
JournalIEEE Transactions on Very Large Scale Integration (VLSI) Systems
Volume20
Issue number1
DOIs
StatePublished - Jan 2012

Funding

Manuscript received November 17, 2009; revised May 01, 2010 and August 08, 2010; accepted September 19, 2010. Date of publication December 10, 2010; date of current version December 14, 2011. This work is supported in part by the National Science Foundation under Award CCF-0829950 and CCF-0954157. Z. Li was with is with the University of Colorado at Boulder, on leave from the Institute of Microelectronics, Tsinghua University, Beijing, 100084, China. M. Mohamed, X. Chen, E. Dudley, L. Shang, A. Mickelson, and M. Vach-harajani are with the Department of Electrical, Computer, and Energy Engineering, University of Colorado at Boulder, Boulder, CO 80309 USA. (e-mail: [email protected]). K. Meng and R. Joseph are with the Department of Electrical Engineering and Computer Science, Northwestern University, Evanston, IL 60208 USA. B. Schwartz is with Tech-X Corporation, 5621 Arapahoe Avenue, Boulder, CO 80303 USA.. Y. Sun is with the Department of Microelectronics and Nanoelectronics, Institute of Microelectronics, Tsinghua University, Beijing, 100084, China. Color versions of one or more of the figures in this paper are available online at http://ieeexplore.ieee.org. Digital Object Identifier 10.1109/TVLSI.2010.2089072

Keywords

  • Multicore processing
  • Multiprocessor interconnection networks
  • Nanophotonics
  • Reliability

ASJC Scopus subject areas

  • Software
  • Hardware and Architecture
  • Electrical and Electronic Engineering

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