Abstract
The active participation of external entities in the manufacturing flow has produced numerous hardware security issues in which piracy and overproduction are likely to be the most ubiquitous and expensive ones. The main approach to prevent unauthorized products from functioning is logic encryption that inserts key-controlled gates to the original circuit in a way that the valid behavior of the circuit only happens when the correct key is applied. The challenge for the security designer is to ensure neither the correct key nor the original circuit can be revealed by different analyses of the encrypted circuit. However, in state-of-the-art logic encryption works, a lot of performance is sold to guarantee security against powerful logic and structural attacks. This contradicts the primary reason of logic encryption that is to protect a precious design from being pirated and overproduced. In this paper, we propose a bilateral logic encryption platform that maintains high degree of security with small circuit modification. The robustness against exact and approximate attacks is also demonstrated.
Original language | English (US) |
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Title of host publication | Proceedings of the 2020 Design, Automation and Test in Europe Conference and Exhibition, DATE 2020 |
Editors | Giorgio Di Natale, Cristiana Bolchini, Elena-Ioana Vatajelu |
Publisher | Institute of Electrical and Electronics Engineers Inc. |
Pages | 13-18 |
Number of pages | 6 |
ISBN (Electronic) | 9783981926347 |
DOIs | |
State | Published - Mar 2020 |
Event | 2020 Design, Automation and Test in Europe Conference and Exhibition, DATE 2020 - Grenoble, France Duration: Mar 9 2020 → Mar 13 2020 |
Publication series
Name | Proceedings of the 2020 Design, Automation and Test in Europe Conference and Exhibition, DATE 2020 |
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Conference
Conference | 2020 Design, Automation and Test in Europe Conference and Exhibition, DATE 2020 |
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Country/Territory | France |
City | Grenoble |
Period | 3/9/20 → 3/13/20 |
Funding
This work is partially supported by NSF under CNS-1441695, CNS-1651695, and CCF-1533656.
Keywords
- Affectability Ratio
- Circuit Obfuscation
- Corruptibility Ratio
- Logic Complexity
- Logic Encryption
- Logic Locking
- SAT-based Attack
- Structural Complexity
ASJC Scopus subject areas
- Hardware and Architecture
- Safety, Risk, Reliability and Quality
- Modeling and Simulation
- Electrical and Electronic Engineering