SAT-based bit-flipping attack on logic encryptions

Yuanqi Shen, Amin Rezaei, Hai Zhou

Research output: Chapter in Book/Report/Conference proceedingConference contribution

8 Scopus citations

Abstract

Logic encryption is a hardware security technique that uses extra key inputs to prevent unauthorized use of a circuit. With the discovery of the SAT-based attack, new encryption techniques such as SARLock and Anti-SAT are proposed, and further combined with traditional logic encryption techniques, to guarantee both high error rates and resilience to the SAT-based attack. In this paper, the SAT-based bit-flipping attack is presented. It first separates the two groups of keys via SAT-based bit-flippings, and then attacks the traditional encryption and the SAT-resilient encryption, by conventional SAT-based attack and by-passing attack, respectively. The experimental results show that the bit-flipping attack successfully returns a circuit with the correct functionality and significantly reduces the execution time compared with other advanced attacks.

Original languageEnglish (US)
Title of host publicationProceedings of the 2018 Design, Automation and Test in Europe Conference and Exhibition, DATE 2018
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages629-632
Number of pages4
ISBN (Electronic)9783981926316
DOIs
StatePublished - Apr 19 2018
Event2018 Design, Automation and Test in Europe Conference and Exhibition, DATE 2018 - Dresden, Germany
Duration: Mar 19 2018Mar 23 2018

Publication series

NameProceedings of the 2018 Design, Automation and Test in Europe Conference and Exhibition, DATE 2018
Volume2018-January

Other

Other2018 Design, Automation and Test in Europe Conference and Exhibition, DATE 2018
CountryGermany
CityDresden
Period3/19/183/23/18

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ASJC Scopus subject areas

  • Safety, Risk, Reliability and Quality
  • Hardware and Architecture
  • Software
  • Information Systems and Management

Cite this

Shen, Y., Rezaei, A., & Zhou, H. (2018). SAT-based bit-flipping attack on logic encryptions. In Proceedings of the 2018 Design, Automation and Test in Europe Conference and Exhibition, DATE 2018 (pp. 629-632). (Proceedings of the 2018 Design, Automation and Test in Europe Conference and Exhibition, DATE 2018; Vol. 2018-January). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.23919/DATE.2018.8342086