Scalable software latency hiding schemes: Evaluation of the poststore and prefetch options

Chaitanya Tumuluri; Alok N. Choudhary

doi:10.1007/bfb0024740

Scalable software latency hiding schemes: Evaluation of the poststore and prefetch options

Chaitanya Tumuluri, Alok N. Choudhary

Electrical and Computer Engineering

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

1 Scopus citations

Abstract

Most latency hiding studies for Distributed Shared Memory (DSM) systems use prefetching, while few explore use of poststoring. This study develops, and compares performance gains obtained using, a runtime poststoring scheme (PST) and an application-specific prefetching scheme (PFH). The PST and PFH schemes produced scalable reductions in loop execution times.

Original language	English (US)
Title of host publication	Euro-Par 1996 Parallel Processing - 2nd International Euro-Par Conference, Proceedings
Editors	Luc Bouge, Pierre Fraigniaud, Anne Mignotte, Yves Robert
Publisher	Springer Verlag
Pages	486-491
Number of pages	6
ISBN (Print)	3540616276, 9783540616276
DOIs	https://doi.org/10.1007/bfb0024740
State	Published - 1996
Event	2nd International Euro-Par Conference on Parallel Processing, Euro-Par 1996 - Lyon, France Duration: Aug 26 1996 → Aug 29 1996

Publication series

Name	Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)
Volume	1124
ISSN (Print)	0302-9743
ISSN (Electronic)	1611-3349

Other

Other	2nd International Euro-Par Conference on Parallel Processing, Euro-Par 1996
Country/Territory	France
City	Lyon
Period	8/26/96 → 8/29/96

ASJC Scopus subject areas

Theoretical Computer Science
General Computer Science

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10.1007/bfb0024740

Cite this

Tumuluri, C., & Choudhary, A. N. (1996). Scalable software latency hiding schemes: Evaluation of the poststore and prefetch options. In L. Bouge, P. Fraigniaud, A. Mignotte, & Y. Robert (Eds.), Euro-Par 1996 Parallel Processing - 2nd International Euro-Par Conference, Proceedings (pp. 486-491). (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics); Vol. 1124). Springer Verlag. https://doi.org/10.1007/bfb0024740

Tumuluri, Chaitanya ; Choudhary, Alok N. / Scalable software latency hiding schemes : Evaluation of the poststore and prefetch options. Euro-Par 1996 Parallel Processing - 2nd International Euro-Par Conference, Proceedings. editor / Luc Bouge ; Pierre Fraigniaud ; Anne Mignotte ; Yves Robert. Springer Verlag, 1996. pp. 486-491 (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)).

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abstract = "Most latency hiding studies for Distributed Shared Memory (DSM) systems use prefetching, while few explore use of poststoring. This study develops, and compares performance gains obtained using, a runtime poststoring scheme (PST) and an application-specific prefetching scheme (PFH). The PST and PFH schemes produced scalable reductions in loop execution times.",

author = "Chaitanya Tumuluri and Choudhary, {Alok N.}",

note = "Publisher Copyright: {\textcopyright} 1996, Springer Verlag. All rights reserved.; 2nd International Euro-Par Conference on Parallel Processing, Euro-Par 1996 ; Conference date: 26-08-1996 Through 29-08-1996",

year = "1996",

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series = "Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)",

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Tumuluri, C & Choudhary, AN 1996, Scalable software latency hiding schemes: Evaluation of the poststore and prefetch options. in L Bouge, P Fraigniaud, A Mignotte & Y Robert (eds), Euro-Par 1996 Parallel Processing - 2nd International Euro-Par Conference, Proceedings. Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics), vol. 1124, Springer Verlag, pp. 486-491, 2nd International Euro-Par Conference on Parallel Processing, Euro-Par 1996, Lyon, France, 8/26/96. https://doi.org/10.1007/bfb0024740

Scalable software latency hiding schemes: Evaluation of the poststore and prefetch options. / Tumuluri, Chaitanya; Choudhary, Alok N.
Euro-Par 1996 Parallel Processing - 2nd International Euro-Par Conference, Proceedings. ed. / Luc Bouge; Pierre Fraigniaud; Anne Mignotte; Yves Robert. Springer Verlag, 1996. p. 486-491 (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics); Vol. 1124).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

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AB - Most latency hiding studies for Distributed Shared Memory (DSM) systems use prefetching, while few explore use of poststoring. This study develops, and compares performance gains obtained using, a runtime poststoring scheme (PST) and an application-specific prefetching scheme (PFH). The PST and PFH schemes produced scalable reductions in loop execution times.

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BT - Euro-Par 1996 Parallel Processing - 2nd International Euro-Par Conference, Proceedings

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ER -

Tumuluri C, Choudhary AN. Scalable software latency hiding schemes: Evaluation of the poststore and prefetch options. In Bouge L, Fraigniaud P, Mignotte A, Robert Y, editors, Euro-Par 1996 Parallel Processing - 2nd International Euro-Par Conference, Proceedings. Springer Verlag. 1996. p. 486-491. (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)). doi: 10.1007/bfb0024740

Scalable software latency hiding schemes: Evaluation of the poststore and prefetch options

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