@inproceedings{15717491274e4fa292b02fd138ae0fcf,
title = "Scheduling algorithms for automated synthesis of pipelined designs on FPGAs for applications described in MATLAB",
abstract = "We present a high-level synthesis framework to synthesize optimized hardware on FPGAs from algorithms described in MATLAB. We focus on a framework to pipeline loops present in the input application. We present a range of scheduling algorithms to obtain the pipeline schedule and discuss their comparative strengths. The synthesized hardwares have been mapped to a Xilinx XC4028 FPGA with external memory and corresponding experimental results are included.",
author = "Malay Haldar and Anshuman Nayak and Alok Choudhary and Prith Banerjee",
year = "2000",
doi = "10.1145/354880.354893",
language = "English (US)",
isbn = "1581133383",
series = "Proceedings of the International Conference on Compilers, Architecture and Synthesis for Embedded Systems",
publisher = "Association for Computing Machinery (ACM)",
pages = "85--92",
booktitle = "Proceedings of the International Conference on Compilers, Architecture and Synthesis for Embedded Systems",
address = "United States",
note = "Proceedings of the International Conference on Compilers, Architecture, and Synthesis for Embedded Systems (CASES 2000) ; Conference date: 17-11-2000 Through 18-11-2000",
}