@article{62ab882c66a04227a3ec197fd0815f41,
title = "SmipRef: An efficient method for multi-domain clock skew scheduling",
abstract = "Conventional clock skew scheduling (CSS) for sequential circuits can be solved effectively using methods including the parametric shortest path algorithm and Howard's algorithm. Nevertheless, its application is practically limited due to the difficulties in reliably implementing a large set of arbitrary dedicated clock delays for flip-flops. Thus multi-domain clock skew scheduling (MDCSS) was proposed to tackle this by constraining the total number of clock delays. However, this new problem is hard to solve optimally in general. In this paper, we propose a novel method to efficiently solve it. Under mild restrictions, the problem is transformed into a special mixed integer linear programming problem, which can be solved optimally using similar techniques for the CSS problem. Then the solution quality is further improved by a critical-cycle-oriented refinement. As a result, our method obtains optimal solutions for 88 of the 93 tests on ISCAS89 benchmarks. The experimental results on large circuits in Opencores benchmarks also demonstrate its efficiency of at least one order faster than existing algorithms. To improve the runtime performance, we also devise a graph pruning algorithm that can be applied to methods for the MDCSS problem as a preprocessing step. Its application on our method shows a speedup of 2.66X on average.",
keywords = "Clock skew scheduling, Minimum cycle ratio, Multi-domain, Timing optimization",
author = "Yanling Zhi and Luk, {Wai Shing} and Hai Zhou and Xuan Zeng",
note = "Funding Information: Xuan Zeng received the B.S. and Ph.D. degrees in Electrical Engineering from Fudan University, Shanghai, China, in 1991 and 1997 respectively. She is currently a Full Professor with the Microelectronics Department, and serves as the Director of State Key Laboratory of Application Specific Integrated Circuits (ASIC) and Systems, Fudan University. She was a Visiting Professor with the Electrical Engineering Department, Texas A&M University, College Station, and Microelectronics Department, Technische Universiteit Delft, Delft, The Netherlands, in 2002 and 2003 respectively. Her current research interests include design for manufacturability, high-speed interconnect analysis and optimization, analog behavioral modeling, circuit simulation, and ASIC design. Dr. Zeng received the First-Class Award of Electronic Information Science and Technology from the Chinese Institute of Electronics, Beijing, China, in 2005. She received the Second-Class Award of Science and Technology Advancement and the Cross-Century Outstanding Scholar Award from the Ministry of Education of China in 2006 and 2002 respectively. She received the award of “IT Top 10” in Shanghai in 2003. She served on the Technical Program Committee of the IEEE/ACM Asia and South Pacific Design Automation Conference in 2000 and 2005. Funding Information: This research is supported partly by National Natural Science Foundation of China (NSFC) research project 61125401 , 60976034 , 61076033 and 61274032 , partly by the National Basic Research Program of China under the Grant 2011CB309701 , partly by the National major Science and Technology Special Project 2011ZX01035-001-001-003 of China during the 12-th five-year plan period, and partly by the NSF under CCF-0811270 and CCF-1115550 . ",
year = "2013",
month = sep,
doi = "10.1016/j.vlsi.2012.11.001",
language = "English (US)",
volume = "46",
pages = "392--403",
journal = "Integration, the VLSI Journal",
issn = "0167-9260",
publisher = "Elsevier B.V.",
number = "4",
}