Software-assisted hardware reliability: Abstracting circuit-level challenges to the software stack

Vijay Janapa Reddi, Meeta S. Gupta, Michael D. Smith, Gu Yeon Wei, David Brooks, Simone Campanoni

Research output: Chapter in Book/Report/Conference proceedingConference contribution

21 Scopus citations

Abstract

Power constrained designs are becoming increasingly sensitive to supply voltage noise. We propose a hardware-software collaborative approach to enable aggressive operating margins: a checkpoint-recovery mechanism corrects margin violations, while a run-time software layer reschedules the program's instruction stream to prevent recurring margin crossings at the same program location. The run-time layer removes 60% of these events with minimal overhead, thereby significantly improving overall performance.

Original languageEnglish (US)
Title of host publication2009 46th ACM/IEEE Design Automation Conference, DAC 2009
Pages788-793
Number of pages6
StatePublished - 2009
Event2009 46th ACM/IEEE Design Automation Conference, DAC 2009 - San Francisco, CA, United States
Duration: Jul 26 2009Jul 31 2009

Publication series

NameProceedings - Design Automation Conference
ISSN (Print)0738-100X

Other

Other2009 46th ACM/IEEE Design Automation Conference, DAC 2009
Country/TerritoryUnited States
CitySan Francisco, CA
Period7/26/097/31/09

Keywords

  • Hardware software co-design
  • Runtime optimization

ASJC Scopus subject areas

  • Computer Science Applications
  • Control and Systems Engineering
  • Electrical and Electronic Engineering
  • Modeling and Simulation

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