Source Line Sensing in Magneto-Electric Random-Access Memory to Reduce Read Disturbance and Improve Sensing Margin

Hochul Lee; Cecile Grezes; Shaodi Wang; Farbod Ebrahimi; Puneet Gupta; Pedram Khalili Amiri; Kang L. Wang

doi:10.1109/LMAG.2016.2552149

Source Line Sensing in Magneto-Electric Random-Access Memory to Reduce Read Disturbance and Improve Sensing Margin

Hochul Lee^*, Cecile Grezes, Shaodi Wang, Farbod Ebrahimi, Puneet Gupta, Pedram Khalili Amiri, Kang L. Wang

^*Corresponding author for this work

Electrical and Computer Engineering

Research output: Contribution to journal › Article › peer-review

12 Scopus citations

Abstract

A source line sensing (SLS) scheme is presented, along with a corresponding memory core circuit architecture, for the sensing operation of magneto-electric random-access memory (MeRAM). Compared to a conventional bit-line sensing (BLS) scheme, the proposed SLS, which exploits the voltage-controlled magnetic anisotropy (VCMA) effect, applies a voltage across the magneto-electric tunnel junction (MEJ) with an opposite polarity. The SLS significantly reduces read disturbance and increases the sensing margin due to the enhanced coercivity of the bit during the read operation. Experimental data demonstrate that the thermal stability of nanoscale MEJs increases up to 2 times during the SLS operation compared with conventional BLS. An MEJ compact model based the SLS simulation shows that read disturbance improves by a factor greater than 10{}^{9} fJ/V\cdot m and the sensing margin increases up to 3 times in the MEJ with the large VCMA coefficient \left(>\text{100}\ \text{fJ}/\text{V}\cdot\text{m}\right).

Original language	English (US)
Article number	7448888
Journal	IEEE Magnetics Letters
Volume	7
DOIs	https://doi.org/10.1109/LMAG.2016.2552149
State	Published - 2016

Funding

This work was supported in part by the NSF Nanosystems Engineering Research Center for TANMS. The authors would like to acknowledge the collaboration of this research with KACST via the CEGN

Keywords

Spin Electronics
magnetoelectric random access memory (MeRAM)
magnetoelectric tunnel junction (MEJ)
read disturbance
thermal stability
tunneling magnetoresistance (TMR)
voltage controlled magnetic anisotropy (VCMA)

ASJC Scopus subject areas

Electronic, Optical and Magnetic Materials

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10.1109/LMAG.2016.2552149

Cite this

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title = "Source Line Sensing in Magneto-Electric Random-Access Memory to Reduce Read Disturbance and Improve Sensing Margin",

abstract = "A source line sensing (SLS) scheme is presented, along with a corresponding memory core circuit architecture, for the sensing operation of magneto-electric random-access memory (MeRAM). Compared to a conventional bit-line sensing (BLS) scheme, the proposed SLS, which exploits the voltage-controlled magnetic anisotropy (VCMA) effect, applies a voltage across the magneto-electric tunnel junction (MEJ) with an opposite polarity. The SLS significantly reduces read disturbance and increases the sensing margin due to the enhanced coercivity of the bit during the read operation. Experimental data demonstrate that the thermal stability of nanoscale MEJs increases up to 2 times during the SLS operation compared with conventional BLS. An MEJ compact model based the SLS simulation shows that read disturbance improves by a factor greater than 10\{\}\textasciicircum{}\{9\} fJ/V\textbackslash{}cdot m and the sensing margin increases up to 3 times in the MEJ with the large VCMA coefficient \textbackslash{}left(>\textbackslash{}text\{100\}\textbackslash{} \textbackslash{}text\{fJ\}/\textbackslash{}text\{V\}\textbackslash{}cdot\textbackslash{}text\{m\}\textbackslash{}right).",

keywords = "Spin Electronics, magnetoelectric random access memory (MeRAM), magnetoelectric tunnel junction (MEJ), read disturbance, thermal stability, tunneling magnetoresistance (TMR), voltage controlled magnetic anisotropy (VCMA)",

author = "Hochul Lee and Cecile Grezes and Shaodi Wang and Farbod Ebrahimi and Puneet Gupta and Amiri, \{Pedram Khalili\} and Wang, \{Kang L.\}",

note = "Funding Information: This work was supported in part by the NSF Nanosystems Engineering Research Center for TANMS. The authors would like to acknowledge the collaboration of this research with KACST via the CEGN Publisher Copyright: {\textcopyright} 2010-2012 IEEE.",

year = "2016",

doi = "10.1109/LMAG.2016.2552149",

language = "English (US)",

volume = "7",

journal = "IEEE Magnetics Letters",

issn = "1949-307X",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

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T1 - Source Line Sensing in Magneto-Electric Random-Access Memory to Reduce Read Disturbance and Improve Sensing Margin

AU - Lee, Hochul

AU - Grezes, Cecile

AU - Wang, Shaodi

AU - Ebrahimi, Farbod

AU - Gupta, Puneet

AU - Amiri, Pedram Khalili

AU - Wang, Kang L.

N1 - Funding Information: This work was supported in part by the NSF Nanosystems Engineering Research Center for TANMS. The authors would like to acknowledge the collaboration of this research with KACST via the CEGN Publisher Copyright: © 2010-2012 IEEE.

PY - 2016

Y1 - 2016

N2 - A source line sensing (SLS) scheme is presented, along with a corresponding memory core circuit architecture, for the sensing operation of magneto-electric random-access memory (MeRAM). Compared to a conventional bit-line sensing (BLS) scheme, the proposed SLS, which exploits the voltage-controlled magnetic anisotropy (VCMA) effect, applies a voltage across the magneto-electric tunnel junction (MEJ) with an opposite polarity. The SLS significantly reduces read disturbance and increases the sensing margin due to the enhanced coercivity of the bit during the read operation. Experimental data demonstrate that the thermal stability of nanoscale MEJs increases up to 2 times during the SLS operation compared with conventional BLS. An MEJ compact model based the SLS simulation shows that read disturbance improves by a factor greater than 10{}^{9} fJ/V\cdot m and the sensing margin increases up to 3 times in the MEJ with the large VCMA coefficient \left(>\text{100}\ \text{fJ}/\text{V}\cdot\text{m}\right).

AB - A source line sensing (SLS) scheme is presented, along with a corresponding memory core circuit architecture, for the sensing operation of magneto-electric random-access memory (MeRAM). Compared to a conventional bit-line sensing (BLS) scheme, the proposed SLS, which exploits the voltage-controlled magnetic anisotropy (VCMA) effect, applies a voltage across the magneto-electric tunnel junction (MEJ) with an opposite polarity. The SLS significantly reduces read disturbance and increases the sensing margin due to the enhanced coercivity of the bit during the read operation. Experimental data demonstrate that the thermal stability of nanoscale MEJs increases up to 2 times during the SLS operation compared with conventional BLS. An MEJ compact model based the SLS simulation shows that read disturbance improves by a factor greater than 10{}^{9} fJ/V\cdot m and the sensing margin increases up to 3 times in the MEJ with the large VCMA coefficient \left(>\text{100}\ \text{fJ}/\text{V}\cdot\text{m}\right).

KW - Spin Electronics

KW - magnetoelectric random access memory (MeRAM)

KW - magnetoelectric tunnel junction (MEJ)

KW - read disturbance

KW - thermal stability

KW - tunneling magnetoresistance (TMR)

KW - voltage controlled magnetic anisotropy (VCMA)

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Source Line Sensing in Magneto-Electric Random-Access Memory to Reduce Read Disturbance and Improve Sensing Margin

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