Thermal stresses in layered electronic assemblies

Z. Q. Jiang, Y. Huang, A. Chandra

Research output: Contribution to journalArticlepeer-review

101 Scopus citations


Thermal stresses in layered electronic assemblies are one of the causes of the mechanical failure of electronic packages. A simple but accurate method of estimating these thermal stresses is needed for the design of these packages. A simple approach based on beam theory exists, but it suffers from nonequilibrium of the peeling stress distribution. An improved method that overcomes this drawback is proposed here. For layered electronics with thin adhesives, simple analytical expressions are obtained/or interfacial shear stress and peeling stress, as well as for other stress components. The finite element method is used to verify these solutions. It shows excellent agreement between the finite element results and these simple solutions, especially when the moduli of adhesive layers are significantly lower than the moduli of the other layers. This method provides an accurate estimate of thermal stresses for use in package design involving thin and compliant interface or adhesive layers.

Original languageEnglish (US)
Pages (from-to)127-132
Number of pages6
JournalJournal of Electronic Packaging, Transactions of the ASME
Issue number2
StatePublished - Jun 1997

ASJC Scopus subject areas

  • Electronic, Optical and Magnetic Materials
  • Mechanics of Materials
  • Computer Science Applications
  • Electrical and Electronic Engineering


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