Three-dimensional chip-multiprocessor run-time thermal management

Changyun Zhu*, Zhenyu Gu, Li Shang, Robert P. Dick, Russell E Joseph

*Corresponding author for this work

Research output: Contribution to journalArticlepeer-review

163 Scopus citations

Abstract

Three-dimensional integration has the potential to improve the communication latency and integration density of chip-level multiprocessors (CMPs). However, the stacked high-power density layers of 3-D CMPs increase the importance and difficulty of thermal management. In this paper, we investigate the 3-D CMP run-time thermal management problem and describe efficient management techniques. This paper makes the following main contributions: 1) It identifies and describes the critical concepts required for optimal thermal management, namely the methods by which heterogeneity in both workload power characteristics and processor core thermal characteristics should be exploited; and 2) it proposes an efficient proactive continuously engaged hardware and operating system thermal management technique governed by optimal thermal management polices. The proposed technique is evaluated using multiprogrammed and multithreaded benchmarks in an integrated power, performance, and temperature full-system simulation environment. We find that proactive power-thermal budgeting allows a 30% improvement in instruction throughput compared to a proactive thermal management approach that bases decisions only upon local information. The software components of the proposed thermal management technique have been implemented in the Linux 2.6.8 kernel. This source code will be publicly released. The analysis and technique developed in this paper provide a general solution for future 3-D and 2-D CMPs.

Original languageEnglish (US)
Article number4527121
Pages (from-to)1479-1492
Number of pages14
JournalIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Volume27
Issue number8
DOIs
StatePublished - Aug 2008

Funding

Manuscript received February 12, 2008; revised March 31, 2008. This work was supported in part by the NSERC under Discovery Grant 388694-01, in part by the National Science Foundation under Awards CNS-0347941, CNS-0702761, and CNS-0720691, and in part by the Semiconductor Research Corporation under Award 2007-HJ-1593. This paper was recommended by Associate Editor D. Atienza.

Keywords

  • 3-D integration
  • Chip-multiprocessor
  • Thermal management

ASJC Scopus subject areas

  • Software
  • Computer Graphics and Computer-Aided Design
  • Electrical and Electronic Engineering

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