Ultra-low-power, high-density spintronic programmable logic (SPL)

Kang L. Wang, Hochul Lee, Farbod Ebrahimi, Pedram Khalili Amiri

Research output: Chapter in Book/Report/Conference proceedingConference contribution

3 Scopus citations


A non-volatile spintronic programmable logic (SPL), based on a 3-teriminal magnetic tunnel junction (MTJ), is presented and simulated using a compact device model. The SPL structure is compatible with CMOS technology and can be fabricated in the back end of line (BEOL). The proposed SPL exploits the gate-voltage-modulated spin Hall effect (V-SHE) switching, which combines the voltage controlled magnetic anisotropy (VCMA) effect and SHE, as a parallel configuration method. The VCMA modulates the coercivity of the MTJ, reducing the critical current for the SHE to change the state of MTJs. This allows the SPL to achieve 100x faster configuration speed due to the parallel configuration, and 32% area reduction because of minimized transistors in the write circuit, compared to conventional spin transfer torque memory (STT-RAM) based programmable logic.

Original languageEnglish (US)
Title of host publicationISCAS 2016 - IEEE International Symposium on Circuits and Systems
PublisherInstitute of Electrical and Electronics Engineers Inc.
Number of pages4
ISBN (Electronic)9781479953400
StatePublished - Jul 29 2016
Event2016 IEEE International Symposium on Circuits and Systems, ISCAS 2016 - Montreal, Canada
Duration: May 22 2016May 25 2016

Publication series

NameProceedings - IEEE International Symposium on Circuits and Systems
ISSN (Print)0271-4310


Other2016 IEEE International Symposium on Circuits and Systems, ISCAS 2016


  • Spin Electronics
  • gate-voltage-modulated SHE switching
  • magnetic tunnel junction (MTJ)
  • perpendicular magnetic anisotropy (PMA)
  • spin Hall effect (SHE)
  • voltage controlled magnetic anisotropy (VCMA)

ASJC Scopus subject areas

  • Electrical and Electronic Engineering


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