VMM emulation of intel hardware transactional memory

Maciej Swiech, Kyle C. Hale, Peter A Dinda

Research output: Chapter in Book/Report/Conference proceedingConference contribution

1 Scopus citations

Abstract

We describe the design, implementation, and evaluation of emulated hardware transactional memory, specifically the Intel Haswell Restricted Transactional Memory (RTM) architectural extensions for x86/64, within a virtual machine monitor (VMM). Our system allows users to investigate RTM on hardware that does not provide it, debug their RTM-based transactional software, and stress test it on diverse emulated hardware configurations, including potential future configurations that might support arbitrary length trans- actions. Initial performance results suggest that we are able to accomplish this approximately 60 times faster than under a full emulator. A noteworthy aspect of our system is a novel page-flipping technique that allows us to completely avoid instruction emulation, and to limit instruction decoding to only that necessary to determine instruction length. This makes it possible to implement RTM emulation, and poten- tially other techniques, far more compactly than would oth- erwise be possible. We have implemented our system in the context of the Palacios VMM. Our techniques are not specific to Palacios, and could be implemented in other VMMs.

Original languageEnglish (US)
Title of host publicationProceedings of the 4th International Workshop on Runtime and Operating Systems for Supercomputers, ROSS 2014 - In Conjunction with ICS 2014
PublisherAssociation for Computing Machinery
ISBN (Print)9781450329507
DOIs
StatePublished - 2014
Event4th International Workshop on Runtime and Operating Systems for Supercomputers, ROSS 2014 - In Conjunction with ICS 2014 - Munich, Germany
Duration: Jun 10 2014Jun 10 2014

Publication series

NameProceedings of the 4th International Workshop on Runtime and Operating Systems for Supercomputers, ROSS 2014 - In Conjunction with ICS 2014

Other

Other4th International Workshop on Runtime and Operating Systems for Supercomputers, ROSS 2014 - In Conjunction with ICS 2014
CountryGermany
CityMunich
Period6/10/146/10/14

ASJC Scopus subject areas

  • Hardware and Architecture
  • Electrical and Electronic Engineering

Fingerprint Dive into the research topics of 'VMM emulation of intel hardware transactional memory'. Together they form a unique fingerprint.

Cite this