Wafer-scale solution-derived molecular gate dielectrics for low-voltage graphene electronics

Vinod K. Sangwan; Deep Jariwala; Ken Everaerts; Julian J. McMorrow; Jianting He; Matthew Grayson; Lincoln J. Lauhon; Tobin J. Marks; Mark C. Hersam

doi:10.1063/1.4866387

Wafer-scale solution-derived molecular gate dielectrics for low-voltage graphene electronics

Vinod K. Sangwan, Deep Jariwala, Ken Everaerts, Julian J. McMorrow, Jianting He, Matthew Grayson, Lincoln J. Lauhon, Tobin J. Marks^*, Mark C. Hersam

^*Corresponding author for this work

Research output: Contribution to journal › Article › peer-review

20 Scopus citations

Abstract

Graphene field-effect transistors are integrated with solution-processed multilayer hybrid organic-inorganic self-assembled nanodielectrics (SANDs). The resulting devices exhibit low-operating voltage (2 V), negligible hysteresis, current saturation with intrinsic gain >1.0 in vacuum (pressure < 2 × 10^-5 Torr), and overall improved performance compared to control devices on conventional SiO₂ gate dielectrics. Statistical analysis of the field-effect mobility and residual carrier concentration demonstrate high spatial uniformity of the dielectric interfacial properties and graphene transistor characteristics over full 3 in. wafers. This work thus establishes SANDs as an effective platform for large-area, high-performance graphene electronics.

Original language	English (US)
Article number	083503
Journal	Applied Physics Letters
Volume	104
Issue number	8
DOIs	https://doi.org/10.1063/1.4866387
State	Published - Feb 24 2014

ASJC Scopus subject areas

Physics and Astronomy (miscellaneous)

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title = "Wafer-scale solution-derived molecular gate dielectrics for low-voltage graphene electronics",

abstract = "Graphene field-effect transistors are integrated with solution-processed multilayer hybrid organic-inorganic self-assembled nanodielectrics (SANDs). The resulting devices exhibit low-operating voltage (2 V), negligible hysteresis, current saturation with intrinsic gain >1.0 in vacuum (pressure < 2 × 10-5 Torr), and overall improved performance compared to control devices on conventional SiO2 gate dielectrics. Statistical analysis of the field-effect mobility and residual carrier concentration demonstrate high spatial uniformity of the dielectric interfacial properties and graphene transistor characteristics over full 3 in. wafers. This work thus establishes SANDs as an effective platform for large-area, high-performance graphene electronics.",

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AU - Sangwan, Vinod K.

AU - Jariwala, Deep

AU - Everaerts, Ken

AU - McMorrow, Julian J.

AU - He, Jianting

AU - Grayson, Matthew

AU - Lauhon, Lincoln J.

AU - Marks, Tobin J.

AU - Hersam, Mark C.

PY - 2014/2/24

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AB - Graphene field-effect transistors are integrated with solution-processed multilayer hybrid organic-inorganic self-assembled nanodielectrics (SANDs). The resulting devices exhibit low-operating voltage (2 V), negligible hysteresis, current saturation with intrinsic gain >1.0 in vacuum (pressure < 2 × 10-5 Torr), and overall improved performance compared to control devices on conventional SiO2 gate dielectrics. Statistical analysis of the field-effect mobility and residual carrier concentration demonstrate high spatial uniformity of the dielectric interfacial properties and graphene transistor characteristics over full 3 in. wafers. This work thus establishes SANDs as an effective platform for large-area, high-performance graphene electronics.

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Wafer-scale solution-derived molecular gate dielectrics for low-voltage graphene electronics

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