Workload Characterization of Nondeterministic Programs Parallelized by STATS

Enrico A. Deiana, Simone Campanoni

Research output: Chapter in Book/Report/Conference proceedingConference contribution

1 Scopus citations

Abstract

Chip Multiprocessors (CMP) are everywhere, from mobile systems, to servers. Thread Level Parallelism (TLP) is the characteristic of a program that makes use of the parallel cores of a CMP to generate performance. Despite all efforts for creating TLP, multiple cores are still underutilized even though we have been in the multicore era for more than a decade. Recently, a new approach called STATS has been proposed to generate additional TLP for complex and irregular nondeterministic programs. STATS allows a developer to describe application-specific information that its compiler uses to automatically generate a new source of TLP. This new source of TLP increases with the size of the input and it has the potential to generate scalable performance with the number of cores. Even though STATS obtains most of its potential, some of it is still unreached. This paper identifies and characterizes the sources of overhead that are currently blocking STATS parallelized programs to achieve their full potential. To this end, we characterized the workloads generated by the STATS compiler on a 28 core Intel-based machine (dual-socket). This paper shows that the performance loss is due to a combination of factors: some can be optimized via engineering efforts and some require a deeper evolution of STATS. We also highlight potential solutions to significantly reduce most of this overhead. Exploiting these insights will unblock scalable performance for the parallel binaries generated by STATS.

Original languageEnglish (US)
Title of host publicationProceedings - 2019 IEEE International Symposium on Performance Analysis of Systems and Software, ISPASS 2019
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages190-201
Number of pages12
ISBN (Electronic)9781728107462
DOIs
StatePublished - Apr 22 2019
Event2019 IEEE International Symposium on Performance Analysis of Systems and Software, ISPASS 2019 - Madison, United States
Duration: Mar 24 2019Mar 26 2019

Publication series

NameProceedings - 2019 IEEE International Symposium on Performance Analysis of Systems and Software, ISPASS 2019

Conference

Conference2019 IEEE International Symposium on Performance Analysis of Systems and Software, ISPASS 2019
Country/TerritoryUnited States
CityMadison
Period3/24/193/26/19

Keywords

  • Nondeterminism
  • Parallelizing compiler
  • Speculation
  • Workload characterization

ASJC Scopus subject areas

  • Hardware and Architecture
  • Software
  • Safety, Risk, Reliability and Quality

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