Yield-aware cache architectures

Serkan Ozdemir*, Debjit Sinha, Gokhan Memik, Jonathan Adams, Hai Zhou

*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceedingConference contribution

78 Scopus citations

Abstract

One of the major issues faced by the semiconductor industry today is that of reducing chip yields. As the process technologies have scaled to smaller feature sizes, chip yields have dropped to around 50% or less. This figure is expected to decrease even further in future technologies. To attack this growing problem, we develop four yield-aware microarchitecture schemes for data caches. The first one is called Yield-Aware Power-Down (YAPD). YAPD turns off cache ways that cause delay violation and/or have excessive leakage. We also modify this approach to achieve better yields. This new method is called Horizontal YAPD (H-YAPD), which turns off horizontal regions of the cache instead of ways. A third approach targets delay violation in data caches. Particularly, we develop a VAriable-latency Cache Architecture (VACA). VACA allows different load accesses to be completed with varying latencies. This is enabled by augmenting the functional units with special buffers that allow the dependants of a load operation to stall for a cycle if the load operation is delayed. As a result, if some accesses take longer than the predefined number of cycles, the execution can still be performed correctly, albeit with some performance degradation. A fourth scheme we devise is called the Hybrid mechanism, which combines the YAPD and the VACA. As a result of these schemes, chips that may be tossed away due to parametric yield loss can be saved. Experimental results demonstrate that the yield losses can be reduced by 68.1% and 72.4% with YAPD and H-YAPD schemes and by 33.3% and 81.1% with VACA and Hybrid mechanisms, respectively, improving the overall yield to as much as 97.0%.

Original languageEnglish (US)
Title of host publicationProceedings of the 39th Annual IEEE/ACM International Symposium on Microarchitecture, MICRO-39
Pages15-25
Number of pages11
DOIs
StatePublished - Dec 1 2006
Event39th Annual IEEE/ACM International Symposium on Microarchitecture, MICRO-39 - Orlando, FL, United States
Duration: Dec 9 2006Dec 13 2006

Other

Other39th Annual IEEE/ACM International Symposium on Microarchitecture, MICRO-39
CountryUnited States
CityOrlando, FL
Period12/9/0612/13/06

ASJC Scopus subject areas

  • Engineering(all)

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