Yield driven gate sizing for coupling-noise reduction under uncertainty

Debjit Sinha*, Hai Zhou

*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceedingConference contribution

4 Scopus citations

Abstract

This paper presents a post-route gate-sizing algorithm for coupling-noise reduction that constrains the yield loss under process variations. Algorithms for coupling-noise reduction which do not consider uncertainty in the manufacturing process can make a circuit susceptible to failure. Using probabilistic models, the coupling-noise reduction problem is solved as a fixpoint computation problem on a lattice. A novel gate-sizing algorithm with low area overhead is proposed for coupling-noise reduction under uncertainty. Experimental results are reported for the ISCAS benchmarks and larger circuits with comparisons to traditional approaches.

Original languageEnglish (US)
Title of host publicationProceedings of the 2005 Asia and South Pacific Design Automation Conference, ASP-DAC 2005
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages192-197
Number of pages6
ISBN (Print)0780387368, 9780780387362
DOIs
StatePublished - Jan 1 2005
Event2005 Asia and South Pacific Design Automation Conference, ASP-DAC 2005 - Shanghai, China
Duration: Jan 18 2005Jan 21 2005

Publication series

NameProceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC
Volume1

Other

Other2005 Asia and South Pacific Design Automation Conference, ASP-DAC 2005
CountryChina
CityShanghai
Period1/18/051/21/05

ASJC Scopus subject areas

  • Computer Science Applications
  • Computer Graphics and Computer-Aided Design
  • Electrical and Electronic Engineering

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    Sinha, D., & Zhou, H. (2005). Yield driven gate sizing for coupling-noise reduction under uncertainty. In Proceedings of the 2005 Asia and South Pacific Design Automation Conference, ASP-DAC 2005 (pp. 192-197). [1466156] (Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC; Vol. 1). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1145/1120725.1120803